E3 - hash board problem

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    PD: I try change pools and coins ETH and small coin like ETP and keep same problem never charge the hash board

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    [ 0.000000] Booting Linux on physical CPU 0x0
    [ 0.000000] Linux version 3.14.0-xilinx-ge8a2f71-dirty (lzq@armdev2) (gcc version 4.8.3 20140320 (prerelease) (Sourcery CodeBench Lite 2014.05-23) ) #82 SMP PREEMPT Tue May 16 19:49:53 CST 2017
    [ 0.000000] CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
    [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
    [ 0.000000] Machine model: Xilinx Zynq
    [ 0.000000] cma: CMA: reserved 128 MiB at 16800000
    [ 0.000000] Memory policy: Data cache writealloc
    [ 0.000000] On node 0 totalpages: 126976
    [ 0.000000] free_area_init_node: node 0, pgdat c0740a40, node_mem_map debd8000
    [ 0.000000] Normal zone: 992 pages used for memmap
    [ 0.000000] Normal zone: 0 pages reserved
    [ 0.000000] Normal zone: 126976 pages, LIFO batch:31
    [ 0.000000] PERCPU: Embedded 8 pages/cpu @debc1000 s9088 r8192 d15488 u32768
    [ 0.000000] pcpu-alloc: s9088 r8192 d15488 u32768 alloc=8*4096
    [ 0.000000] pcpu-alloc: [0] 0 [0] 1
    [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 125984
    [ 0.000000] Kernel command line: noinitrd mem=496M console=ttyPS0,115200 root=ubi0:rootfs ubi.mtd=1 rootfstype=ubifs rw rootwait
    [ 0.000000] PID hash table entries: 2048 (order: 1, 8192 bytes)
    [ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
    [ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
    [ 0.000000] Memory: 364356K/507904K available (5032K kernel code, 283K rwdata, 1916K rodata, 204K init, 258K bss, 143548K reserved, 0K highmem)
    [ 0.000000] Virtual kernel memory layout:
    [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
    [ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
    [ 0.000000] vmalloc : 0xdf800000 - 0xff000000 ( 504 MB)
    [ 0.000000] lowmem : 0xc0000000 - 0xdf000000 ( 496 MB)
    [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
    [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
    [ 0.000000] .text : 0xc0008000 - 0xc06d1374 (6949 kB)
    [ 0.000000] .init : 0xc06d2000 - 0xc0705380 ( 205 kB)
    [ 0.000000] .data : 0xc0706000 - 0xc074cf78 ( 284 kB)
    [ 0.000000] .bss : 0xc074cf84 - 0xc078d9fc ( 259 kB)
    [ 0.000000] Preemptible hierarchical RCU implementation.
    [ 0.000000] Dump stacks of tasks blocking RCU-preempt GP.
    [ 0.000000] RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
    [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
    [ 0.000000] NR_IRQS:16 nr_irqs:16 16
    [ 0.000000] ps7-slcr mapped to df802000
    [ 0.000000] zynq_clock_init: clkc starts at df802100
    [ 0.000000] Zynq clock init
    [ 0.000014] sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 3298534883328ns
    [ 0.000296] ps7-ttc #0 at df804000, irq=43
    [ 0.000593] Console: colour dummy device 80x30
    [ 0.000622] Calibrating delay loop... 1325.46 BogoMIPS (lpj=6627328)
    [ 0.040200] pid_max: default: 32768 minimum: 301
    [ 0.040414] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
    [ 0.040433] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
    [ 0.042510] CPU: Testing write buffer coherency: ok
    [ 0.042821] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
    [ 0.042878] Setting up static identity map for 0x4c4b00 - 0x4c4b58
    [ 0.043096] L310 cache controller enabled
    [ 0.043115] l2x0: 8 ways, CACHE_ID 0x410000c8, AUX_CTRL 0x72760000, Cache size: 512 kB
    [ 0.120990] CPU1: Booted secondary processor
    [ 0.210221] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
    [ 0.210351] Brought up 2 CPUs
    [ 0.210370] SMP: Total of 2 processors activated.
    [ 0.210379] CPU: All CPU(s) started in SVC mode.
    [ 0.211034] devtmpfs: initialized
    [ 0.213407] VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
    [ 0.214589] regulator-dummy: no parameters
    [ 0.221948] NET: Registered protocol family 16
    [ 0.224220] DMA: preallocated 256 KiB pool for atomic coherent allocations
    [ 0.226489] cpuidle: using governor ladder
    [ 0.226503] cpuidle: using governor menu
    [ 0.233833] syscon f8000000.ps7-slcr: regmap [mem 0xf8000000-0xf8000fff] registered
    [ 0.235344] hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
    [ 0.235357] hw-breakpoint: maximum watchpoint size is 4 bytes.
    [ 0.235466] zynq-ocm f800c000.ps7-ocmc: ZYNQ OCM pool: 256 KiB @ 0xdf880000
    [ 0.257091] bio: create slab at 0
    [ 0.258478] vgaarb: loaded
    [ 0.259176] SCSI subsystem initialized
    [ 0.260057] usbcore: registered new interface driver usbfs
    [ 0.260268] usbcore: registered new interface driver hub
    [ 0.260490] usbcore: registered new device driver usb
    [ 0.261014] media: Linux media interface: v0.10
    [ 0.261300] Linux video capture interface: v2.00
    [ 0.261551] pps_core: LinuxPPS API ver. 1 registered
    [ 0.261562] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti
    [ 0.261692] PTP clock support registered
    [ 0.262050] EDAC MC: Ver: 3.0.0
    [ 0.263077] Advanced Linux Sound Architecture Driver Initialized.
    [ 0.265789] DMA-API: preallocated 4096 debug entries
    [ 0.265802] DMA-API: debugging enabled by kernel config
    [ 0.265875] Switched to clocksource arm_global_timer
    [ 0.286421] NET: Registered protocol family 2
    [ 0.287069] TCP established hash table entries: 4096 (order: 2, 16384 bytes)
    [ 0.287126] TCP bind hash table entries: 4096 (order: 3, 32768 bytes)
    [ 0.287211] TCP: Hash tables configured (established 4096 bind 4096)
    [ 0.287257] TCP: reno registered
    [ 0.287274] UDP hash table entries: 256 (order: 1, 8192 bytes)
    [ 0.287305] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
    [ 0.287532] NET: Registered protocol family 1
    [ 0.287861] RPC: Registered named UNIX socket transport module.
    [ 0.287874] RPC: Registered udp transport module.
    [ 0.287882] RPC: Registered tcp transport module.
    [ 0.287891] RPC: Registered tcp NFSv4.1 backchannel transport module.
    [ 0.287904] PCI: CLS 0 bytes, default 64
    [ 0.288321] hw perfevents: enabled with ARMv7 Cortex-A9 PMU driver, 7 counters available
    [ 0.290290] futex hash table entries: 512 (order: 3, 32768 bytes)
    [ 0.292359] jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
    [ 0.292555] msgmni has been set to 967
    [ 0.293312] io scheduler noop registered
    [ 0.293325] io scheduler deadline registered
    [ 0.293363] io scheduler cfq registered (default)
    [ 0.303389] dma-pl330 f8003000.ps7-dma: Loaded driver for PL330 DMAC-2364208
    [ 0.303409] dma-pl330 f8003000.ps7-dma: DBUFF-128x8bytes Num_Chans-8 Num_Peri-4 Num_Events-16
    [ 0.425185] e0001000.serial: ttyPS0 at MMIO 0xe0001000 (irq = 82, base_baud = 3124999) is a xuartps
    [ 0.993455] console [ttyPS0] enabled
    [ 0.997728] xdevcfg f8007000.ps7-dev-cfg: ioremap 0xf8007000 to df866000
    [ 1.005322] [drm] Initialized drm 1.1.0 20060810
    [ 1.022278] brd: module loaded
    [ 1.031659] loop: module loaded
    [ 1.041039] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k
    [ 1.046863] e1000e: Copyright(c) 1999 - 2013 Intel Corporation.
    [ 1.054563] libphy: XEMACPS mii bus: probed
    [ 1.059000] ------------- phy_id = 0x3625e62
    [ 1.063716] xemacps e000b000.ps7-ethernet: pdev->id -1, baseaddr 0xe000b000, irq 54
    [ 1.072487] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
    [ 1.079134] ehci-pci: EHCI PCI platform driver
    [ 1.086607] zynq-dr e0002000.ps7-usb: Unable to init USB phy, missing?
    [ 1.093420] usbcore: registered new interface driver usb-storage
    [ 1.100308] mousedev: PS/2 mouse device common for all mice
    [ 1.106413] i2c /dev entries driver
    [ 1.113287] zynq-edac f8006000.ps7-ddrc: ecc not enabled
    [ 1.118814] cpufreq_cpu0: failed to get cpu0 regulator: -19
    [ 1.124686] Xilinx Zynq CpuIdle Driver started
    [ 1.129563] sdhci: Secure Digital Host Controller Interface driver
    [ 1.135659] sdhci: Copyright(c) Pierre Ossman
    [ 1.140021] sdhci-pltfm: SDHCI platform and OF driver helper
    [ 1.146880] mmc0: no vqmmc regulator found
    [ 1.150897] mmc0: no vmmc regulator found
    [ 1.195915] mmc0: SDHCI controller on e0100000.ps7-sdio [e0100000.ps7-sdio] using ADMA
    [ 1.204582] usbcore: registered new interface driver usbhid
    [ 1.210098] usbhid: USB HID core driver
    [ 1.214781] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xda
    [ 1.221065] nand: Micron MT29F2G08ABAEAWP
    [ 1.225041] nand: 256MiB, SLC, page size: 2048, OOB size: 64
    [ 1.230979] Bad block table found at page 131008, version 0x01
    [ 1.237207] Bad block table found at page 130944, version 0x01
    [ 1.243258] 3 ofpart partitions found on MTD device pl353-nand
    [ 1.249027] Creating 3 MTD partitions on "pl353-nand":
    [ 1.254130] 0x000000000000-0x000002000000 : "BOOT.bin-env-dts-kernel"
    [ 1.262161] 0x000002000000-0x00000b000000 : "angstram-rootfs"
    [ 1.269475] 0x00000b000000-0x000010000000 : "upgrade-rootfs"
    [ 1.278382] TCP: cubic registered
    [ 1.281617] NET: Registered protocol family 17
    [ 1.286341] Registering SWP/SWPB emulation handler
    [ 1.292214] regulator-dummy: disabling
    [ 1.296535] UBI: attaching mtd1 to ubi0
    [ 1.823444] UBI: scanning is finished
    [ 1.835059] UBI: attached mtd1 (name "angstram-rootfs", size 144 MiB) to ubi0
    [ 1.842136] UBI: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes
    [ 1.848899] UBI: min./max. I/O unit sizes: 2048/2048, sub-page size 2048
    [ 1.855563] UBI: VID header offset: 2048 (aligned 2048), data offset: 4096
    [ 1.862441] UBI: good PEBs: 1152, bad PEBs: 0, corrupted PEBs: 0
    [ 1.868422] UBI: user volume: 1, internal volumes: 1, max. volumes count: 128
    [ 1.875529] UBI: max/mean erase counter: 2/1, WL threshold: 4096, image sequence number: 1919229689
    [ 1.884572] UBI: available PEBs: 0, total reserved PEBs: 1152, PEBs reserved for bad PEB handling: 40
    [ 1.893789] UBI: background thread "ubi_bgt0d" started, PID 1080
    [ 1.893794] drivers/rtc/hctosys.c: unable to open rtc device (rtc0)
    [ 1.897662] ALSA device list:
    [ 1.897665] No soundcards found.
    [ 1.914075] UBIFS: background thread "ubifs_bgt0_0" started, PID 1082
    [ 1.943049] UBIFS: recovery needed
    [ 2.024438] UBIFS: recovery completed
    [ 2.028118] UBIFS: mounted UBI device 0, volume 0, name "rootfs"
    [ 2.034041] UBIFS: LEB size: 126976 bytes (124 KiB), min./max. I/O unit sizes: 2048 bytes/2048 bytes
    [ 2.043173] UBIFS: FS size: 128626688 bytes (122 MiB, 1013 LEBs), journal size 9023488 bytes (8 MiB, 72 LEBs)
    [ 2.053059] UBIFS: reserved for root: 0 bytes (0 KiB)
    [ 2.058099] UBIFS: media format: w4/r0 (latest is w4/r0), UUID DEDD7C11-32A0-4AA3-8565-51B1276FD83F, small LPT model
    [ 2.069374] VFS: Mounted root (ubifs filesystem) on device 0:11.
    [ 2.076798] devtmpfs: mounted
    [ 2.079899] Freeing unused kernel memory: 204K (c06d2000 - c0705000)
    [ 2.918357] random: dd urandom read with 0 bits of entropy available
    [ 3.305924]
    [ 3.305924] bcm54xx_config_init
    [ 3.915920]
    [ 3.915920] bcm54xx_config_init
    [ 6.916755] xemacps e000b000.ps7-ethernet: Set clk to 24999999 Hz
    [ 6.922842] xemacps e000b000.ps7-ethernet: link up (100/FULL)
    [ 16.077135] In axi fpga driver!
    [ 16.080206] request_mem_region OK!
    [ 16.083597] AXI fpga dev virtual address is 0xdf9fc000
    [ 16.088778] *base_vir_addr = 0xc518
    [ 16.103156] In fpga mem driver!
    [ 16.106650] request_mem_region OK!
    [ 16.110158] fpga mem virtual address is 0xe2000000
    [ 20.965370]
    [ 20.965370] bcm54xx_config_init
    [ 21.595300]
    [ 21.595300] bcm54xx_config_init
    [ 24.595799] xemacps e000b000.ps7-ethernet: Set clk to 24999999 Hz
    [ 24.601828] xemacps e000b000.ps7-ethernet: link up (100/FULL)
    [ 792.152192] random: nonblocking pool is initialized
    [2020-10-06 19:03:23] (11997)->[main]: Log file path: /mnt/tmp/bmminer.log Open flag: a+
    [2020-10-06 19:03:23] (12056)->[main]: Started cgminer 5.4.0
    [2020-10-06 19:03:23] (00169)->[set_fpga_t9plus_and_bypass]: Set HW V:[a000c518]

    [2020-10-06 19:03:24] (01251)->[check_chain]: Plug In Socket 2

    [2020-10-06 19:03:25] (03645)->[bmsc_prepare]: SLOT [0] Pluged[0]!

    [2020-10-06 19:03:25] (03645)->[bmsc_prepare]: SLOT [1] Pluged[0]!

    [2020-10-06 19:03:25] (03645)->[bmsc_prepare]: SLOT [2] Pluged[1]!

    [2020-10-06 19:03:25] (03368)->[bmsc_fill_eth_work]: Fill Work Thread Chain[3] Startup!

    [2020-10-06 19:03:25] (03368)->[bmsc_fill_eth_work]: Fill Work Thread Chain[12] Startup!

    [2020-10-06 19:03:25] (03165)->[PreInitBySingleChain]: Init Chian[3]...

    [2020-10-06 19:03:25] (03368)->[bmsc_fill_eth_work]: Fill Work Thread Chain[13] Startup!

    [2020-10-06 19:03:25] (03165)->[PreInitBySingleChain]: Init Chian[12]...

    [2020-10-06 19:03:25] (03138)->[setup_stratum_socket]: Failed to resolve (?wrong URL) etp.2miners.com:9292
    [2020-10-06 19:03:25] (03138)->[setup_stratum_socket]: Failed to resolve (?wrong URL) stratum+tcp://:(null)
    [2020-10-06 19:03:25] (03138)->[setup_stratum_socket]: Failed to resolve (?wrong URL) stratum+tcp://:(null)
    [2020-10-06 19:03:25] (03165)->[PreInitBySingleChain]: Init Chian[13]...

    [2020-10-06 19:03:25] (00864)->[GetAllChipStatusSync]: Chain [3] Check Chip Done!

    [2020-10-06 19:03:25] (00880)->[GetAllChipStatusSync]: Get 2 Chip(s) On Chain [3]

    [2020-10-06 19:03:25] (03213)->[PreInitBySingleChain]: Setting Addr...

    [2020-10-06 19:03:25] (03220)->[PreInitBySingleChain]: Set Chip [0] to Addr [00]...

    [2020-10-06 19:03:25] (03220)->[PreInitBySingleChain]: Set Chip [1] to Addr [0f]...

    [2020-10-06 19:03:25] (00864)->[GetAllChipStatusSync]: Chain [12] Check Chip Done!

    [2020-10-06 19:03:25] (00880)->[GetAllChipStatusSync]: Get 2 Chip(s) On Chain [12]

    [2020-10-06 19:03:25] (03213)->[PreInitBySingleChain]: Setting Addr...

    [2020-10-06 19:03:25] (03220)->[PreInitBySingleChain]: Set Chip [0] to Addr [00]...

    [2020-10-06 19:03:25] (03220)->[PreInitBySingleChain]: Set Chip [1] to Addr [0f]...

    [2020-10-06 19:03:25] (00864)->[GetAllChipStatusSync]: Chain [13] Check Chip Done!

    [2020-10-06 19:03:25] (00880)->[GetAllChipStatusSync]: Get 2 Chip(s) On Chain [13]

    [2020-10-06 19:03:25] (03213)->[PreInitBySingleChain]: Setting Addr...

    [2020-10-06 19:03:25] (03220)->[PreInitBySingleChain]: Set Chip [0] to Addr [00]...

    [2020-10-06 19:03:25] (03220)->[PreInitBySingleChain]: Set Chip [1] to Addr [0f]...

    [2020-10-06 19:03:25] (00864)->[GetAllChipStatusSync]: Chain [3] Check Chip Done!

    [2020-10-06 19:03:25] (00880)->[GetAllChipStatusSync]: Get 2 Chip(s) On Chain [3]

    [2020-10-06 19:03:25] (02969)->[Set_Misc_IIC_Enable]: Config Chain[3] MiscCtrl...

    [2020-10-06 19:03:25] (00864)->[GetAllChipStatusSync]: Chain [12] Check Chip Done!

    [2020-10-06 19:03:25] (00880)->[GetAllChipStatusSync]: Get 2 Chip(s) On Chain [12]

    [2020-10-06 19:03:25] (02969)->[Set_Misc_IIC_Enable]: Config Chain[12] MiscCtrl...

    [2020-10-06 19:03:25] (03106)->[Read_DDR_Manufactor]: Config Chain[3] giic...

    [2020-10-06 19:03:25] (03106)->[Read_DDR_Manufactor]: Config Chain[12] giic...

    [2020-10-06 19:03:25] (00864)->[GetAllChipStatusSync]: Chain [13] Check Chip Done!

    [2020-10-06 19:03:25] (00880)->[GetAllChipStatusSync]: Get 2 Chip(s) On Chain [13]

    [2020-10-06 19:03:25] (02969)->[Set_Misc_IIC_Enable]: Config Chain[13] MiscCtrl...

    [2020-10-06 19:03:26] (03106)->[Read_DDR_Manufactor]: Config Chain[13] giic...

    [2020-10-06 19:03:26] (03129)->[Read_DDR_Manufactor]: IIC Data:[00]

    [2020-10-06 19:03:26] (03239)->[PreInitBySingleChain]: Chain [3] Will Use Profile[00]...

    [2020-10-06 19:03:26] (02969)->[Set_Misc_IIC_Enable]: Config Chain[3] MiscCtrl...

    [2020-10-06 19:03:26] (03129)->[Read_DDR_Manufactor]: IIC Data:[00]

    [2020-10-06 19:03:26] (03239)->[PreInitBySingleChain]: Chain [12] Will Use Profile[00]...

    [2020-10-06 19:03:26] (02969)->[Set_Misc_IIC_Enable]: Config Chain[12] MiscCtrl...

    [2020-10-06 19:03:26] (02986)->[Set_Auto_Read_Temp_Addr_Reg]: Config Chain[3] Ext Temp Reg...

    [2020-10-06 19:03:26] (03370)->[bmsc_fill_eth_work]: Chain [3] Now Waiting Flag To Next Step!
    [2020-10-06 19:03:26] (02986)->[Set_Auto_Read_Temp_Addr_Reg]: Config Chain[12] Ext Temp Reg...

    [2020-10-06 19:03:26] (03129)->[Read_DDR_Manufactor]: IIC Data:[00]

    [2020-10-06 19:03:26] (03239)->[PreInitBySingleChain]: Chain [13] Will Use Profile[00]...

    [2020-10-06 19:03:26] (02969)->[Set_Misc_IIC_Enable]: Config Chain[13] MiscCtrl...

    [2020-10-06 19:03:26] (03015)->[Set_Chip_Temp_Pos]: Config Chain[3] Analog Mux Reg...

    [2020-10-06 19:03:26] (03370)->[bmsc_fill_eth_work]: Chain [12] Now Waiting Flag To Next Step!
    [2020-10-06 19:03:26] (03015)->[Set_Chip_Temp_Pos]: Config Chain[12] Analog Mux Reg...

    [2020-10-06 19:03:26] (02986)->[Set_Auto_Read_Temp_Addr_Reg]: Config Chain[13] Ext Temp Reg...

    [2020-10-06 19:03:26] (03000)->[Set_IIC_Auto_Read_Temp_Enable]: Config Chain[3] giic...

    [2020-10-06 19:03:26] (03370)->[bmsc_fill_eth_work]: Chain [13] Now Waiting Flag To Next Step!
    [2020-10-06 19:03:26] (03000)->[Set_IIC_Auto_Read_Temp_Enable]: Config Chain[12] giic...

    [2020-10-06 19:03:26] (03015)->[Set_Chip_Temp_Pos]: Config Chain[13] Analog Mux Reg...

    [2020-10-06 19:03:26] (06861)->[hashmeter]: cgminer time error total_secs = 1602011006.560900 last_total_secs = 1.000000
    [2020-10-06 19:03:26] (03000)->[Set_IIC_Auto_Read_Temp_Enable]: Config Chain[13] giic...

    [2020-10-06 19:03:26] (00864)->[GetAllChipStatusSync]: Chain [3] Check Chip Done!

    [2020-10-06 19:03:26] (00880)->[GetAllChipStatusSync]: Get 2 Chip(s) On Chain [3]

    [2020-10-06 19:03:26] (00864)->[GetAllChipStatusSync]: Chain [12] Check Chip Done!

    [2020-10-06 19:03:26] (00880)->[GetAllChipStatusSync]: Get 2 Chip(s) On Chain [12]

    [2020-10-06 19:03:26] (00864)->[GetAllChipStatusSync]: Chain [13] Check Chip Done!

    [2020-10-06 19:03:26] (00880)->[GetAllChipStatusSync]: Get 2 Chip(s) On Chain [13]

    [2020-10-06 19:03:27] (03377)->[bmsc_fill_eth_work]: Chain [3] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[0]

    [2020-10-06 19:03:27] (03377)->[bmsc_fill_eth_work]: Chain [12] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[0]

    [2020-10-06 19:03:27] (03377)->[bmsc_fill_eth_work]: Chain [13] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[0]

    [2020-10-06 19:03:28] (01624)->[ddr_training_test]: VVVVVV======[ddr_0000 BIST] success!

    [2020-10-06 19:03:28] (01624)->[ddr_training_test]: VVVVVV======[ddr_0000 BIST] success!

    [2020-10-06 19:03:28] (01624)->[ddr_training_test]: VVVVVV======[ddr_0000 BIST] success!

    [2020-10-06 19:03:29] (01624)->[ddr_training_test]: VVVVVV======[ddr_1000 BIST] success!

    [2020-10-06 19:03:29] (01624)->[ddr_training_test]: VVVVVV======[ddr_1000 BIST] success!

    [2020-10-06 19:03:29] (01624)->[ddr_training_test]: VVVVVV======[ddr_1000 BIST] success!

    [2020-10-06 19:03:30] (02313)->[check_nonce_thr]: Start To Check Each Chain Asic Status...

    [2020-10-06 19:03:30] (01624)->[ddr_training_test]: VVVVVV======[ddr_2000 BIST] success!

    [2020-10-06 19:03:30] (01624)->[ddr_training_test]: VVVVVV======[ddr_2000 BIST] success!

    [2020-10-06 19:03:30] (02692)->[auth_stratum_eth]: Didn't Set Worker Name, Will Use MacAddr!

    [2020-10-06 19:03:30] (02698)->[auth_stratum_eth]: Using Worker:'08FF03BB5DF5'

    [2020-10-06 19:03:30] (01624)->[ddr_training_test]: VVVVVV======[ddr_2000 BIST] success!

    [2020-10-06 19:03:31] (12480)->[main]: pool->stratum_active changed! [0]->[1]

    [2020-10-06 19:03:32] (01435)->[ddr_training_test]: Chain [3]Bist Line[1435]Err!, Err=[-1]

    [2020-10-06 19:03:32] (03256)->[PreInitBySingleChain]: Chain[3] Bist Failed, Will Retry! Err=[-1]

    [2020-10-06 19:03:32] (01435)->[ddr_training_test]: Chain [12]Bist Line[1435]Err!, Err=[-1]

    [2020-10-06 19:03:32] (03256)->[PreInitBySingleChain]: Chain[12] Bist Failed, Will Retry! Err=[-1]

    [2020-10-06 19:03:32] (03165)->[PreInitBySingleChain]: Init Chian[3]...

    [2020-10-06 19:03:32] (01435)->[ddr_training_test]: Chain [13]Bist Line[1435]Err!, Err=[-1]

    [2020-10-06 19:03:32] (03256)->[PreInitBySingleChain]: Chain[13] Bist Failed, Will Retry! Err=[-1]

    [2020-10-06 19:03:32] (03165)->[PreInitBySingleChain]: Init Chian[12]...

    [2020-10-06 19:03:33] (03165)->[PreInitBySingleChain]: Init Chian[13]...

    [2020-10-06 19:03:33] (00864)->[GetAllChipStatusSync]: Chain [3] Check Chip Done!

    [2020-10-06 19:03:33] (00875)->[GetAllChipStatusSync]: Chip Count Not Match On Chain[3]!

    [2020-10-06 19:03:33] (03170)->[PreInitBySingleChain]: Check Chip Failed On Chain[3]

    [2020-10-06 19:03:33] (00864)->[GetAllChipStatusSync]: Chain [12] Check Chip Done!

    [2020-10-06 19:03:33] (00875)->[GetAllChipStatusSync]: Chip Count Not Match On Chain[12]!

    [2020-10-06 19:03:33] (03170)->[PreInitBySingleChain]: Check Chip Failed On Chain[12]

    [2020-10-06 19:03:33] (00864)->[GetAllChipStatusSync]: Chain [13] Check Chip Done!

    [2020-10-06 19:03:33] (00875)->[GetAllChipStatusSync]: Chip Count Not Match On Chain[13]!

    [2020-10-06 19:03:33] (03170)->[PreInitBySingleChain]: Check Chip Failed On Chain[13]

    [2020-10-06 19:03:33] (03165)->[PreInitBySingleChain]: Init Chian[3]...

    [2020-10-06 19:03:33] (03165)->[PreInitBySingleChain]: Init Chian[12]...

    [2020-10-06 19:03:33] (03165)->[PreInitBySingleChain]: Init Chian[13]...

    [2020-10-06 19:03:33] (00864)->[GetAllChipStatusSync]: Chain [3] Check Chip Done!

    [2020-10-06 19:03:33] (00875)->[GetAllChipStatusSync]: Chip Count Not Match On Chain[3]!

    [2020-10-06 19:03:33] (03170)->[PreInitBySingleChain]: Check Chip Failed On Chain[3]

    [2020-10-06 19:03:33] (00864)->[GetAllChipStatusSync]: Chain [12] Check Chip Done!

    [2020-10-06 19:03:33] (00875)->[GetAllChipStatusSync]: Chip Count Not Match On Chain[12]!

    [2020-10-06 19:03:33] (03170)->[PreInitBySingleChain]: Check Chip Failed On Chain[12]

    [2020-10-06 19:03:33] (00864)->[GetAllChipStatusSync]: Chain [13] Check Chip Done!

    [2020-10-06 19:03:33] (03165)->[PreInitBySingleChain]: Init Chian[3]...

    [2020-10-06 19:03:33] (00875)->[GetAllChipStatusSync]: Chip Count Not Match On Chain[13]!

    [2020-10-06 19:03:33] (03170)->[PreInitBySingleChain]: Check Chip Failed On Chain[13]

    [2020-10-06 19:03:33] (03165)->[PreInitBySingleChain]: Init Chian[12]...

    [2020-10-06 19:03:33] (03165)->[PreInitBySingleChain]: Init Chian[13]...

    [2020-10-06 19:03:33] (00864)->[GetAllChipStatusSync]: Chain [3] Check Chip Done!

    [2020-10-06 19:03:33] (00875)->[GetAllChipStatusSync]: Chip Count Not Match On Chain[3]!

    [2020-10-06 19:03:33] (03170)->[PreInitBySingleChain]: Check Chip Failed On Chain[3]

    [2020-10-06 19:03:33] (00864)->[GetAllChipStatusSync]: Chain [12] Check Chip Done!

    [2020-10-06 19:03:33] (00875)->[GetAllChipStatusSync]: Chip Count Not Match On Chain[12]!

    [2020-10-06 19:03:33] (03170)->[PreInitBySingleChain]: Check Chip Failed On Chain[12]

    [2020-10-06 19:03:34] (00864)->[GetAllChipStatusSync]: Chain [13] Check Chip Done!

    [2020-10-06 19:03:34] (00875)->[GetAllChipStatusSync]: Chip Count Not Match On Chain[13]!

    [2020-10-06 19:03:34] (03170)->[PreInitBySingleChain]: Check Chip Failed On Chain[13]

    [2020-10-06 19:03:34] (03165)->[PreInitBySingleChain]: Init Chian[3]...

    [2020-10-06 19:03:34] (03165)->[PreInitBySingleChain]: Init Chian[12]...

    [2020-10-06 19:03:34] (03165)->[PreInitBySingleChain]: Init Chian[13]...

    [2020-10-06 19:03:34] (00864)->[GetAllChipStatusSync]: Chain [3] Check Chip Done!

    [2020-10-06 19:03:34] (00875)->[GetAllChipStatusSync]: Chip Count Not Match On Chain[3]!

    [2020-10-06 19:03:34] (03170)->[PreInitBySingleChain]: Check Chip Failed On Chain[3]

    [2020-10-06 19:03:34] (00864)->[GetAllChipStatusSync]: Chain [12] Check Chip Done!

    [2020-10-06 19:03:34] (00875)->[GetAllChipStatusSync]: Chip Count Not Match On Chain[12]!

    [2020-10-06 19:03:34] (03170)->[PreInitBySingleChain]: Check Chip Failed On Chain[12]

    [2020-10-06 19:03:34] (00864)->[GetAllChipStatusSync]: Chain [13] Check Chip Done!

    [2020-10-06 19:03:34] (03165)->[PreInitBySingleChain]: Init Chian[3]...

    [2020-10-06 19:03:34] (00875)->[GetAllChipStatusSync]: Chip Count Not Match On Chain[13]!

    [2020-10-06 19:03:34] (03170)->[PreInitBySingleChain]: Check Chip Failed On Chain[13]

    [2020-10-06 19:03:34] (03165)->[PreInitBySingleChain]: Init Chian[12]...

    [2020-10-06 19:03:34] (03165)->[PreInitBySingleChain]: Init Chian[13]...

    [2020-10-06 19:03:34] (00864)->[GetAllChipStatusSync]: Chain [3] Check Chip Done!

    [2020-10-06 19:03:34] (00875)->[GetAllChipStatusSync]: Chip Count Not Match On Chain[3]!

    [2020-10-06 19:03:34] (03170)->[PreInitBySingleChain]: Check Chip Failed On Chain[3]

    [2020-10-06 19:03:34] (00864)->[GetAllChipStatusSync]: Chain [12] Check Chip Done!

    [2020-10-06 19:03:34] (00875)->[GetAllChipStatusSync]: Chip Count Not Match On Chain[12]!

    [2020-10-06 19:03:34] (03170)->[PreInitBySingleChain]: Check Chip Failed On Chain[12]

    [2020-10-06 19:03:34] (00864)->[GetAllChipStatusSync]: Chain [13] Check Chip Done!

    [2020-10-06 19:03:34] (00875)->[GetAllChipStatusSync]: Chip Count Not Match On Chain[13]!

    [2020-10-06 19:03:34] (03170)->[PreInitBySingleChain]: Check Chip Failed On Chain[13]

    [2020-10-06 19:03:36] (05527)->[api]: API running in IP access mode on port 4028 (10)
    [2020-10-06 19:03:58] (07423)->[parse_stratum_response_eth]: ETH DEBUG: get a work seedHash changed on pool.NO=0!

    [2020-10-06 19:03:58] (07440)->[parse_stratum_response_eth]: New BLOCK[4260000] Is Newer Than Current Block[0], Change Seed!

    [2020-10-06 19:03:58] (07234)->[CalcCachePthread]: Cpu Start To Calc Cache!

    [2020-10-06 19:03:58] (03861)->[AsicCalcCacheThread]: Chain[3] Start To Control Chip Calc Cache...

    [2020-10-06 19:03:58] (03895)->[AsicCalcCacheThread]: Chain[3] Now Waiting DDR BIST Ready!

    [2020-10-06 19:03:58] (00321)->[CalcCacheData]: get block number=4260000

    [2020-10-06 19:03:58] (03861)->[AsicCalcCacheThread]: Chain[12] Start To Control Chip Calc Cache...

    [2020-10-06 19:03:58] (03895)->[AsicCalcCacheThread]: Chain[12] Now Waiting DDR BIST Ready!

    [2020-10-06 19:03:58] (03861)->[AsicCalcCacheThread]: Chain[13] Start To Control Chip Calc Cache...

    [2020-10-06 19:03:58] (03895)->[AsicCalcCacheThread]: Chain[13] Now Waiting DDR BIST Ready!

    [2020-10-06 19:03:59] (03902)->[AsicCalcCacheThread]: Chain [3] Has Still Waiting For DDR BIST Ready...

    [2020-10-06 19:03:59] (03902)->[AsicCalcCacheThread]: Chain [12] Has Still Waiting For DDR BIST Ready...

    [2020-10-06 19:03:59] (03902)->[AsicCalcCacheThread]: Chain [13] Has Still Waiting For DDR BIST Ready...

    [2020-10-06 19:04:42] (03377)->[bmsc_fill_eth_work]: Chain [3] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[0]

    [2020-10-06 19:04:42] (03377)->[bmsc_fill_eth_work]: Chain [12] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[0]

    [2020-10-06 19:04:42] (03377)->[bmsc_fill_eth_work]: Chain [13] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[0]

    [2020-10-06 19:05:14] (03902)->[AsicCalcCacheThread]: Chain [3] Has Still Waiting For DDR BIST Ready...

    [2020-10-06 19:05:14] (03902)->[AsicCalcCacheThread]: Chain [12] Has Still Waiting For DDR BIST Ready...

    [2020-10-06 19:05:14] (03902)->[AsicCalcCacheThread]: Chain [13] Has Still Waiting For DDR BIST Ready...

    [2020-10-06 19:06:12] (03377)->[bmsc_fill_eth_work]: Chain [3] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[0]

    [2020-10-06 19:06:12] (03377)->[bmsc_fill_eth_work]: Chain [12] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[0]

    [2020-10-06 19:06:12] (03377)->[bmsc_fill_eth_work]: Chain [13] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[0]

    [2020-10-06 19:06:44] (03902)->[AsicCalcCacheThread]: Chain [3] Has Still Waiting For DDR BIST Ready...

    [2020-10-06 19:06:44] (03902)->[AsicCalcCacheThread]: Chain [12] Has Still Waiting For DDR BIST Ready...

    [2020-10-06 19:06:44] (03902)->[AsicCalcCacheThread]: Chain [13] Has Still Waiting For DDR BIST Ready...

    [2020-10-06 19:06:45] (00330)->[CalcCacheData]: ETH DEBUG: CalcCacheData Done, size=35386688

    [2020-10-06 19:06:45] (07241)->[CalcCachePthread]: Cpu Calc Done!

    [2020-10-06 19:06:50] (12485)->[main]: cgpu->isReadyToCalcWork changed! [0]->[1]

    [2020-10-06 19:07:57] (03377)->[bmsc_fill_eth_work]: Chain [3] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[1]

    [2020-10-06 19:07:57] (03377)->[bmsc_fill_eth_work]: Chain [12] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[1]

    [2020-10-06 19:07:57] (03377)->[bmsc_fill_eth_work]: Chain [13] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[1]

    [2020-10-06 19:08:29] (03902)->[AsicCalcCacheThread]: Chain [3] Has Still Waiting For DDR BIST Ready...

    [2020-10-06 19:08:29] (03902)->[AsicCalcCacheThread]: Chain [12] Has Still Waiting For DDR BIST Ready...

    [2020-10-06 19:08:29] (03902)->[AsicCalcCacheThread]: Chain [13] Has Still Waiting For DDR BIST Ready...

    [2020-10-06 19:09:57] (03377)->[bmsc_fill_eth_work]: Chain [3] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[1]

    [2020-10-06 19:09:57] (03377)->[bmsc_fill_eth_work]: Chain [12] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[1]

    [2020-10-06 19:09:57] (03377)->[bmsc_fill_eth_work]: Chain [13] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[1]

    [2020-10-06 19:10:29] (03902)->[AsicCalcCacheThread]: Chain [3] Has Still Waiting For DDR BIST Ready...

    [2020-10-06 19:10:29] (03902)->[AsicCalcCacheThread]: Chain [12] Has Still Waiting For DDR BIST Ready...

    [2020-10-06 19:10:29] (03902)->[AsicCalcCacheThread]: Chain [13] Has Still Waiting For DDR BIST Ready...

    [2020-10-06 19:12:12] (03377)->[bmsc_fill_eth_work]: Chain [3] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[1]

    [2020-10-06 19:12:12] (03377)->[bmsc_fill_eth_work]: Chain [12] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[1]

    [2020-10-06 19:12:12] (03377)->[bmsc_fill_eth_work]: Chain [13] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[1]

    [2020-10-06 19:12:44] (03902)->[AsicCalcCacheThread]: Chain [3] Has Still Waiting For DDR BIST Ready...

    [2020-10-06 19:12:44] (03902)->[AsicCalcCacheThread]: Chain [12] Has Still Waiting For DDR BIST Ready...

    [2020-10-06 19:12:44] (03902)->[AsicCalcCacheThread]: Chain [13] Has Still Waiting For DDR BIST Ready...

    [2020-10-06 19:14:42] (03377)->[bmsc_fill_eth_work]: Chain [3] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[1]

    [2020-10-06 19:14:42] (03377)->[bmsc_fill_eth_work]: Chain [12] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[1]

    [2020-10-06 19:14:42] (03377)->[bmsc_fill_eth_work]: Chain [13] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[1]

    [2020-10-06 19:15:14] (03902)->[AsicCalcCacheThread]: Chain [3] Has Still Waiting For DDR BIST Ready...

    [2020-10-06 19:15:14] (03902)->[AsicCalcCacheThread]: Chain [12] Has Still Waiting For DDR BIST Ready...

    [2020-10-06 19:15:14] (03902)->[AsicCalcCacheThread]: Chain [13] Has Still Waiting For DDR BIST Ready...

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    Kernel log only connect with the trouble board

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    wondering if you have solved the problem; my e3 has the same problem, try to connect to eth pool, after I updated the firmware, it has 0 hash rate,  board status CC, even after it is up for more than 40 to 50 mins.

     

    Any solution for E3? 

     

    Thanks

     

    [2020-11-25 05:49:35] (03734)->[GetDSDONEReturn]: Chain[12]Chip[0f]DS DONE!

    [2020-11-25 05:49:35] (03996)->[AsicCalcCacheThread]: Chain[12] Repare Dag [Start : 381c008][BlockCnt : 703ff2] mount num 9:0!

    [2020-11-25 05:49:44] (03377)->[bmsc_fill_eth_work]: Chain [8] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[1]

    [2020-11-25 05:49:44] (03377)->[bmsc_fill_eth_work]: Chain [1] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[1]

    [2020-11-25 05:49:44] (03377)->[bmsc_fill_eth_work]: Chain [2] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[1]

    [2020-11-25 05:49:44] (03377)->[bmsc_fill_eth_work]: Chain [9] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[1]

    [2020-11-25 05:49:45] (03377)->[bmsc_fill_eth_work]: Chain [11] Still Waiting For Flag, Flag[0]->[0], Flag[1]->[1]

     

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